The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 7075849 B1

PDF
Full Text
Expired
Date of Patent:
Jul. 11, 2006

Filed:

Feb. 24, 2004
Applicants:

Soo-bong Chang, Seoul, KR;

Jung-hwa Lee, Gyeonggi-do, KR;

Chi-wook Kim, Gyeonggi-do, KR;

Byong-mo Moon, Seoul, KR;

Inventors:

Soo-Bong Chang, Seoul, KR;

Jung-Hwa Lee, Gyeonggi-do, KR;

Chi-Wook Kim, Gyeonggi-do, KR;

Byong-Mo Moon, Seoul, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/00 (2006.01); G11C 8/00 (2006.01);
U.S. Cl.
CPC ...
Abstract

Embodiments of the invention provide drivers from active internal voltage generating circuits on both sides of the internal voltage generating lines, therefore a voltage level of the internal voltage generating lines can quickly and uniformly reach a desired internal voltage level. Other embodiments of the invention are described in the claims.


Find Patent Forward Citations

Chang, Soo-Bong. (2006). Semiconductor memory device and layout method thereof (U.S. Patent No. 7075849). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/7075849

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