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For the Inventor, By the Inventor

Hsinchu, Taiwan

Cheng-Hung Lee

This inventor holds 28 USPTO granted patents and 2 published patent applications, primarily in Memory Device Technology. Top assignee: Taiwan Semiconductor Manufacturing Comp. Ltd.. Active years: 2007-2025.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Cheng-Hung Lee. Retrieved from https://idiyas.com/inventor/cheng-hung-lee-oc8v7dhm

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 28 

% Patents Active = 71.4

Average Co-Inventor Count = 3.7

ph-index = 5

Forward Citations = 65(Granted Patents)


Location History:

  • Hukou, TW (2007)
  • Hukou Village, TW (2014)
  • Hsinchu, TW (2008 - 2023)
  • Hsinchu County, TW (2011 - 2024)

Company Filing History:

goldMedal28 out of 42,872 
 
Taiwan Semiconductor Manufacturing Comp. Ltd.
 patents

Years Active: 2007-2025

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Areas of Expertise:
Latch Type Sense Amplifier
Memory Device
Power Management Circuit
SRAM Cell Array
Bit Line Voltage Bias
Dynamic Power Supplies
Memory Macro
Asymmetric Sense Amplifier
Computation Apparatus
Inter-Layer Via
Read Only Memory
Strap Cells
28 patents (USPTO):Explore Patents
1. 12300605 - Reducing internal node loading in combination circuits (2025-05-13),
2. 12249391 - Latch type sense amplifier (2025-03-11),
3. 11869623 - Latch type sense amplifier (2024-01-09),
4. 11854970 - Reducing internal node loading in combination circuits (2023-12-26),
5. 11551747 - Computation apparatus and method using the same (2023-01-10),
6. 11514952 - Memory device with strap cells (2022-11-29),
7. 11450605 - Reducing internal node loading in combination circuits (2022-09-20),
8. 11264081 - Memory circuit, electronic device having the memory circuit, and method of operating memory circuit (2022-03-01),
9. 11087833 - Power management circuit in memory device (2021-08-10),
10. 10964355 - Memory device with strap cells (2021-03-30),
11. 10878890 - Operation assist circuit, memory device and operation assist method (2020-12-29),
12. 10541007 - Memory device with strap cells (2020-01-21),
13. 10510401 - Semiconductor memory device using shared data line for read/write operation (2019-12-17),
14. 10204660 - Memory device with strap cells (2019-02-12),
15. 9842627 - Memory device with strap cells (2017-12-12),

Title: Cheng-Hung Lee: Pioneering Innovation in Hsinchu, Taiwan

Introduction: Cheng-Hung Lee's passion for innovation and his dedication to creating impactful solutions have solidified his position as a prominent inventor in Hsinchu, Taiwan, and beyond. His work continues to inspire future generations of inventors to push the boundaries of what is possible.

Latest Patents:

1. Latch type sense amplifier: Cheng-Hung Lee's innovative device includes an input stage circuit, a switching circuit, and a first latch circuit. This invention showcases his expertise in circuit design and data processing.

2. Reducing internal node loading in combination circuits: Lee's circuit devices aim at optimizing integrated circuits with cascading transistors, reducing internal node loading and improving efficiency in data processing.

Career Highlights: With an impressive 26 patents to his name, Cheng-Hung Lee has made significant contributions in the field of semiconductor technology. He currently works at Taiwan Semiconductor Manufacturing Company Limited, where he continues to innovate and create cutting-edge solutions.

Collaborations: Lee's collaborations with coworkers such as Hung-Jen Liao and Chi-Ting Cheng have been integral to his success. Working together, they have brought forth groundbreaking ideas and inventions that have impacted the industry.

Conclusion: Cheng-Hung Lee's innovative spirit and dedication to pushing the boundaries of technology make him a key figure in the world of inventions. His work at Taiwan Semiconductor Manufacturing Company Limited and his numerous patents showcase his commitment to driving progress and making a lasting impact on the field of innovation.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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