The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 10, 2021
Filed:
Jun. 22, 2020
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Chia-Chen Kuo, Hsinchu, TW;
Cheng-Hung Lee, Hsinchu, TW;
Chi-Ting Cheng, Taichung, TW;
Hua-Hsin Yu, Hsinchu, TW;
Wei-Jer Hsieh, Hsinchu, TW;
Yu-Hao Hsu, Tainan, TW;
Yang-Syu Lin, New Taipei, TW;
Che-Ju Yeh, Kaohsiung, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;
Abstract
A power management circuit suitable for a memory device and a memory device is provided. The power management circuit includes a first logic circuit, a second logic circuit, and a transmission gate. The first logic circuit is configured to receive an inverted first input signal and a second input signal and generates a first output signal. The second logic circuit is configured to receive a first input signal and the second input signal and generates a second output signal. The transmission gate is configured to receive the first output signal and generates a control signal to at least one power transistor coupled between the power management circuit and the memory device. During a standby mode, the power transistor is turned on to make a first voltage equal to a predetermined voltage and during a sleep mode, the control signal is coupled to a first voltage. The predetermined voltage is greater than the first voltage.