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For the Inventor, By the Inventor

Austin, TX, United States of America

Brett W Murdock

This inventor holds 14 USPTO granted patents and 1 EPO patent, primarily in Data Processing Systems. Top assignees: Freescale Semiconductor,inc., Cadence Design Systems, Inc., Motorola Corporation. Active years: 2003-2014.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Brett W Murdock. Retrieved from https://idiyas.com/inventor/brett-w-murdock

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Calculating rank
USPTO Granted Patents = 14

% Patents Active = 92.9


Average Co-Inventor Count = 2.5

ph-index = 4

Forward Citations = 233(Granted Patents)


Location History:

  • Austin, TX (US) (2003 - 2006)
  • Round Rock, TX (US) (2005 - 2014)

Company Filing History:

goldMedal11 out of 5,491 
 
Freescale Semiconductor,inc.
 patents
silverMedal1 out of 2,620 
 
Cadence Design Systems, Inc.
 patents
bronzeMedal1 out of 20,290 
 
Motorola Corporation
 patents
4. 1 out of 834,601 
Other
 patents

Years Active: 2003-2014

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Areas of Expertise:
Transaction Split Boundaries
Memory Burst Boundaries
Context Sensitive Interrupts
Dynamic Timing Bridge
Bus Access Retraction
Memory Access
Arbitration Points
Crossbar Switch
Multi-Port Devices
Air Time Management
Processing Systems
14 patents (USPTO):Explore Patents
1. 8850134 - Method and system for aligning transaction split boundaries to memory burst boundaries (2014-09-30),
2. 7865897 - Selective transaction request processing at an interconnect during a lockout (2011-01-04),
3. 7793025 - Hardware managed context sensitive interrupt priority level control (2010-09-07),
4. 7747889 - Bus having a dynamic timing bridge (2010-06-29),
5. 7353311 - Method of accessing information and system therefor (2008-04-01),
6. 7340542 - Data processing system with bus access retraction (2008-03-04),
7. 7185121 - Method of accessing memory via multiple slave ports (2007-02-27),
8. 7130943 - Data processing system with bus access retraction (2006-10-31),
9. 7124281 - Processing system having sequential address indicator signals (2006-10-17),
10. 7099973 - Method and system of bus master arbitration (2006-08-29),
11. 7080191 - Method and system for accessing memory devices (2006-07-18),
12. 7013357 - Arbiter having programmable arbitration points for undefined length burst accesses and method (2006-03-14),
13. 6954821 - Crossbar switch that supports a multi-port slave device and method of operation (2005-10-11),
14. 6564047 - Advanced air time management (2003-05-13),

Title: The Innovative Contributions of Brett W Murdock

Introduction

Brett W Murdock is a notable inventor based in Austin, TX, with a remarkable portfolio of 14 patents. His work primarily focuses on advancements in system memory and transaction processing, showcasing his expertise in the field of technology.

Latest Patents

Among his latest patents is a method and system for aligning transaction split boundaries to memory burst boundaries. This invention provides a solution that enhances data access in system memory by aligning transaction sub-command breaking points with memory burst boundaries. Another significant patent involves selective transaction request processing at an interconnect during a lockout. This method allows for efficient processing of transaction requests while managing potential interferences, thereby optimizing resource utilization.

Career Highlights

Brett has had a distinguished career, working with prominent companies such as Freescale Semiconductor, Inc. and Motorola Corporation. His experience in these organizations has contributed significantly to his innovative capabilities and understanding of complex systems.

Collaborations

Throughout his career, Brett has collaborated with talented individuals, including William C Moyer and Michael D Fitzsimmons. These partnerships have likely fostered a creative environment that has led to the development of his impactful inventions.

Conclusion

Brett W Murdock's contributions to technology through his patents and collaborations highlight his role as a significant inventor in the field. His innovative methods continue to influence advancements in system memory and transaction processing.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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