Bill Kiang

Title: Bill Kiang and Advances in Wafer-Level Packaging

Introduction

Bill Kiang is an inventor based in Hsinchu, Taiwan. His work includes semiconductor packaging technology, and he is associated with Taiwan Semiconductor Manufacturing Company Limited. Kiang is credited with 6 patents.

Latest Patents

Kiang’s listed patent, “Protected Solder Ball Joints in Wafer Level Chip-Scale Packaging,” describes a design that places solder-ball joints below the surface of an encapsulating buffer layer. The layer is etched to expose electrode posts, which may consist of one or multiple columns. A conductive cap or plating around the posts provides an electrical connection to the solder balls, wiring layers, and circuit layers.

By positioning the solder-ball joints beneath the buffer layer’s surface, the design helps shield them from direct mechanical stress while preserving their electrical connections. This approach addresses a reliability challenge in wafer-level chip-scale packaging.

Career Highlights

Kiang’s patent work reflects a focus on semiconductor interconnections and packaging. The protected-joint design illustrates how structural changes to a package can help safeguard solder connections without interrupting electrical continuity.

Collaborations

Kiang’s listed coworkers include Pei-Haw Tsao and Liang-Chen Lin. Their names are associated with the collaborative context of his patent work.

Conclusion

Bill Kiang’s six patents and his work on protected solder-ball joints highlight his contributions to semiconductor packaging and the reliability of wafer-level chip-scale devices.