The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 2010
Filed:
Nov. 03, 2006
Pei-haw Tsao, Taichung, TW;
Bill Kiang, Hsinchu, TW;
Pao-kang Niu, Hsinchu, TW;
Liang-chen Lin, Hsinchu, TW;
I-tai Liu, Taipei, TW;
Pei-Haw Tsao, Taichung, TW;
Bill Kiang, Hsinchu, TW;
Pao-Kang Niu, Hsinchu, TW;
Liang-Chen Lin, Hsinchu, TW;
I-Tai Liu, Taipei, TW;
Taiwan Seminconductor Manufacturing Co., Ltd., Hsin-Chu, TW;
Abstract
Solder bump structures for semiconductor device packaging is provided. In one embodiment, a semiconductor device comprises a substrate having a bond pad and a first passivation layer formed thereabove, the first passivation layer having an opening therein exposing a portion of the bond pad. A metal pad layer is formed on a portion of the bond pad, wherein the metal pad layer contacts the bond pad. A second passivation layer is formed above the metal pad layer, the second passivation layer having an opening therein exposing a portion of the metal pad layer. A patterned and etched polyimide layer is formed on a portion of the metal pad layer and a portion of the second passivation layer. A conductive layer is formed above a portion of the etched polyimide layer and a portion of the metal pad layer, wherein the conductive layer contacts the metal pad layer. A conductive bump structure is connected to the conductive layer.