Dublin, Ireland

Baris Ozgul

This inventor holds 33 USPTO granted patents and 10 published patent applications and 1 EPO patent, primarily in Data Processing Engines. Top assignees: Xilinx, Inc., Trinity College Dublin. Active years: 2012-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Baris Ozgul. Retrieved from https://idiyas.com/inventor/baris-ozgul

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 33 

% Patents Active = 90.9

 

Average Co-Inventor Count = 5.8

ph-index = 7

Forward Citations = 169(Granted Patents)


Location History:

  • Dundrum, IE (2020 - 2023)
  • Dublin, IE (2012 - 2024)
  • Stoney Road, IE (2024)

Company Filing History:


Years Active: 2012-2026

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Areas of Expertise:
Data Processing Engine
Memory Tiles
Integrated Circuit
Dual Mode Interconnect
Streaming Interconnect
Event-Based Debug
Partial Reconfiguration
Signal Processing
System-On-Chip
Cascade Streaming
Multi-Addressing Mode
Weight Sparsity
33 patents (USPTO):Explore Patents

Title: Baris Ozgul: Innovator in Data Processing Technologies

Introduction

Baris Ozgul is a prolific inventor based in Dublin, Ireland, known for his significant contributions to the field of data processing technologies. With an impressive portfolio of 28 patents, he has established himself as a leading figure in innovation, particularly within the realms of programmable computing architectures.

Latest Patents

Among his latest innovations is a patent for a "Device with data processing engine array that enables partial reconfiguration." This device comprises a processor system and an array of data processing engines (DPEs), designed to allow independent configuration of each DPE based on received data. It notably facilitates the reconfiguration of a subset of DPEs while maintaining the operation of another subset.

Another noteworthy patent is for "Multiple overlays for use with a data processing array." This application focuses on enhancing the efficiency of data movement within a processing array, utilizing various overlays that can be implemented during the runtime of an application. Each overlay can modify the mode of data movement across multiple compute tiles, optimizing performance and throughput.

Career Highlights

Baris has worked with prominent organizations, including Xilinx, Inc., where he contributed to advancements in programmable logic devices and systems. He has also collaborated with The Provost, Fellows, Foundation Scholars, and the Other Members of the Board of the College of the Holy and Undivided Trinity of Queen Elizabeth Near Dublin, furthering academic and practical applications of his inventions.

Collaborations

Throughout his illustrious career, Baris has collaborated with talented professionals in the industry, including notable coworkers like Juan J. Noguera Serra and Jan Langer. These partnerships have enriched his work, leading to innovative solutions and advancements in data processing technologies.

Conclusion

Baris Ozgul's contributions to innovation in data processing reflect a deep commitment to enhancing computing architectures. His patents not only demonstrate technical ingenuity but also pave the way for future advancements in the field. As he continues to push the boundaries of technology, Baris remains a key figure in the ever-evolving landscape of data processing innovations.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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