San Jose, CA, United States of America

Arch Zaliznyak

This inventor holds 19 USPTO granted patents and 2 published patent applications and 3 EPO patents, primarily in High-Speed Serial Interfaces. Top assignees: Altera Corporation, Xilinx, Inc., Dynalogic. Active years: 2000-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Arch Zaliznyak. Retrieved from https://idiyas.com/inventor/arch-zaliznyak

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 19 

% Patents Active = 63.2

 

Average Co-Inventor Count = 3.7

ph-index = 6

Forward Citations = 157(Granted Patents)


Company Filing History:


Years Active: 2000-2026

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Areas of Expertise:
High-Speed Serial Interfaces
Serializer Circuitry
Clock Networks
Data Signal Alignment
Programmable Logic Devices
Voltage Translator
Differential Signal Conditioning
FPGA Circuits
Phase-Locked Loop
Skew Reduction Techniques
Standby Voltage Offset
Reset Distribution
19 patents (USPTO):Explore Patents

Title: Arch Zaliznyak: Innovator in High-Speed Data Transmission

Introduction

Arch Zaliznyak is a prominent inventor based in San Jose, California, known for his significant contributions to the field of high-speed data transmission. With a total of 18 patents to his name, Zaliznyak has made remarkable advancements in serializer circuitry and data signal alignment.

Latest Patents

One of his latest patents is focused on serializer circuitry for high-speed serial data transmitters on programmable logic device integrated circuits. This invention includes circuitry that converts parallel data of various widths into serial data. The circuitry operates across a wide range of frequencies and can utilize reference clock signals with different relationships to both the parallel and serial data rates. Additionally, it is configurable and can be dynamically controlled during user-mode operation of the programmable logic device. Another notable patent involves techniques for aligning and reducing skew in serial data signals. This circuit features first and second aligner circuits along with a deskew circuit, which works to align input serial data signals with a control signal and reduce skew between them.

Career Highlights

Throughout his career, Arch Zaliznyak has worked with leading companies in the technology sector, including Altera Corporation and Xilinx, Inc. His work has significantly impacted the development of high-speed data transmission technologies.

Collaborations

Zaliznyak has collaborated with notable professionals in the field, including Chong H Lee and Ramanand Venkata, contributing to various innovative projects.

Conclusion

Arch Zaliznyak's contributions to high-speed data transmission and his extensive patent portfolio highlight his role as a key innovator in the technology industry. His work continues to influence advancements in data communication technologies.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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