The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 17, 2012
Filed:
Mar. 05, 2007
John Dung-ngoc Lam, San Jose, CA (US);
Arch Zaliznyak, San Jose, CA (US);
Wilson Wong, San Francisco, CA (US);
Tin H. Lai, San Jose, CA (US);
Chong H. Lee, San Ramon, CA (US);
Sergey Shumarayev, San Leandro, CA (US);
John Dung-Ngoc Lam, San Jose, CA (US);
Arch Zaliznyak, San Jose, CA (US);
Wilson Wong, San Francisco, CA (US);
Tin H. Lai, San Jose, CA (US);
Chong H. Lee, San Ramon, CA (US);
Sergey Shumarayev, San Leandro, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A method and apparatus is provided for standby voltage offset cancellation at inputs to a comparator within a receiver channel. Each of a first comparator input and second comparator input is isolated from an input signal such that each of the first and second comparator inputs attains a respective standby voltage level. A voltage level on one of the first and second comparator inputs is incrementally changed, while the output signal of the comparator is monitored. Upon detecting a state transition in the output signal of the comparator, the incremental changing of the voltage level on the one comparator input is stopped at a final voltage level setting. The final voltage level setting is stored in a computer memory for reference in setting of the voltage level at the one comparator input so as to compensate for the standby voltage offset at the inputs to the comparator.