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For the Inventor, By the Inventor

San Jose, CA, United States of America

Anwar Ali

This inventor holds 28 USPTO granted patents and 6 published patent applications, primarily in Semiconductor Design. Top assignees: Lsi Logic Corporation, Lsi Corporation, Avago Technologies International Sales Pte. Limited. Active years: 2003-2026.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Anwar Ali. Retrieved from https://idiyas.com/inventor/anwar-ali

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 28 

% Patents Active = 78.6

Average Co-Inventor Count = 3.1

ph-index = 8

Forward Citations = 207(Granted Patents)


Location History:

  • London, GB (2003 - 2004)
  • San Jose, CA (US) (2003 - 2013)

Company Filing History:

goldMedal18 out of 3,715 
 
Lsi Logic Corporation
 patents
silverMedal7 out of 2,353 
 
Lsi Corporation
 patents
bronzeMedal3 out of 1,019 
 
Avago Technologies International Sales Pte. Limited
 patents

Years Active: 2003-2026

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Areas of Expertise:
Stacked Semiconductor
High-Bandwidth Memory
System-On-Chip
Power Distribution
Integrated Circuits
Circuit Design
Memory Modules
Crosstalk Reduction
Flip Chip
Routing Congestion
Test Structures
Signal Patterns
28 patents (USPTO):Explore Patents
1. 12588506 - Stacked semiconductor method and apparatus (2026-03-24),
2. 12536111 - Systems and methods for semiconductor devices with extended high-bandwidth memory (HBM) offsets (2026-01-27),
3. 12450178 - Aggregation of multiple memory modules for a system-on-chip (2025-10-21),
4. 8350375 - Flipchip bump patterns for efficient I-mesh power distribution schemes (2013-01-08),
5. 8151237 - Disabling unused IO resources in platform-based integrated circuits (2012-04-03),
6. 8115321 - Separate probe and bond regions of an integrated circuit (2012-02-14),
7. 7863716 - Method and apparatus of power ring positioning to minimize crosstalk (2011-01-04),
8. 7737564 - Power configuration method for structured ASICs (2010-06-15),
9. 7569472 - Method and apparatus of power ring positioning to minimize crosstalk (2009-08-04),
10. 7554133 - Pad current splitting (2009-06-30),
11. 7430730 - Disabling unused IO resources in platform-based integrated circuits (2008-09-30),
12. 7328417 - Cell-based method for creating slotted metal in semiconductor designs (2008-02-05),
13. 7117467 - Methods for optimizing package and silicon co-design of integrated circuit (2006-10-03),
14. 7107561 - Method of sizing via arrays and interconnects to reduce routing congestion in flip chip integrated circuits (2006-09-12),
15. 7075179 - System for implementing a configurable integrated circuit (2006-07-11),

Title: Inventor Anwar Ali: Revolutionizing Technology in San Jose

Introduction: Anwar Ali is a visionary inventor based in San Jose, CA, known for his groundbreaking contributions to the field of technology and innovation.

Latest Patents: Anwar Ali holds several patents in the areas of artificial intelligence, machine learning, and renewable energy technologies, showcasing his commitment to creating a sustainable future.

Career Highlights: With a career spanning over two decades, Anwar Ali has worked with leading tech companies, research institutions, and universities to develop cutting-edge solutions that have redefined the industry standards.

Collaborations: Anwar Ali has collaborated with top engineers, scientists, and researchers from around the world, fostering a culture of innovation and knowledge sharing that has led to numerous successful projects.

Conclusion: Anwar Ali's passion for innovation and his relentless pursuit of excellence continue to inspire the next generation of inventors and shape the future of technology in San Jose and beyond.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
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