The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 03, 2012
Filed:
Aug. 22, 2008
Anwar Ali, San Jose, CA (US);
Julie Beatty, Campbell, CA (US);
Kalyan Doddapaneni, Mountain View, CA (US);
Anwar Ali, San Jose, CA (US);
Julie Beatty, Campbell, CA (US);
Kalyan Doddapaneni, Mountain View, CA (US);
LSI Corporation, Milpitas, CA (US);
Abstract
The present invention is directed to methods for disabling unused IO resources in a platform-based integrated circuit. A slice is received from a vendor. The slice includes an IO circuit unused by a customer. The IO circuit is disabled. For example, when the IO circuit is desired to be tied to a power source, a primary input/output pin of the IO circuit is shorted to a power bus of the IO circuit. When the IO circuit is desired to be tied to a ground source, a primary input/output pin of the IO circuit is shorted to a ground bus of the IO circuit. When the IO circuit is desired to be left floated, a primary input/output pin of the IO circuit is not connected to any bonding pad cell of the slice. Next, the IO circuit is removed from the customer's logic design netlist. The IO circuit is inserted in the vendor's physical design database.