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For the Inventor, By the Inventor

San Jose, CA, United States of America

Ananth Durbha

USPTO Granted Patents = 9 

Average Co-Inventor Count = 4.7

ph-index = 3

Forward Citations = 15(Granted Patents)


Company Filing History:

goldMedal8 out of 10 
 
Algotochip Corporation
 patents
silverMedal1 out of 832,843 
Other
 patents

Years Active: 2012-2013

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9 patents (USPTO):Explore Patents
1. 8589854 - Application driven power gating (2013-11-19),
2. 8572544 - Programmatic auto-convergent method for 'physical layout power hot-spot' risk aware ASIP architecture customization for performance optimization (2013-10-29),
3. 8561005 - Programmatic auto-convergent method for physical design floorplan aware re-targetable tool suite generation (compiler-in-the-loop) for simultaneous instruction level (software) power optimization and architecture level performance optimization for ASIP design (2013-10-15),
4. 8516416 - Integrated data model based framework for driving design convergence from architecture optimization to physical design closure (2013-08-20),
5. 8423929 - Intelligent architecture creator (2013-04-16),
6. 8370784 - Automatic optimal integrated circuit generator from algorithms and specification (2013-02-05),
7. 8276107 - Integrated data model based framework for driving design convergence from architecture optimization to physical design closure (2012-09-25),
8. 8225247 - Automatic optimal integrated circuit generator from algorithms and specification (2012-07-17),
9. 8185862 - Architectural level power-aware optimization and risk mitigation (2012-05-22),

Title: Ananth Durbha: Innovator in Integrated Circuit Design

Introduction

Ananth Durbha is a prominent inventor based in San Jose, CA, known for his contributions to integrated circuit (IC) design. With a total of 9 patents to his name, he has made significant advancements in power management systems for custom ICs. His innovative approaches have paved the way for more efficient semiconductor fabrication processes.

Latest Patents

Durbha's latest patents include groundbreaking systems and methods for managing power in custom IC designs. One notable patent is focused on application-driven power gating. This invention involves receiving a specification of the custom IC, generating a profile of the computer-readable code to determine instruction usage, and automatically creating a processor architecture tailored to the code. The architecture includes multiple processing blocks and power domains, allowing for efficient power management based on the code profile.

Another significant patent is the programmatic auto-convergent method for 'physical layout power hot-spot' risk-aware ASIP architecture customization. This method aims to optimize performance by managing power in IC designs through a code profile. It involves receiving an instruction execution sequence and reassigning or delaying instructions to distribute operations across various processing blocks, thereby reducing hot spots.

Career Highlights

Throughout his career, Ananth Durbha has worked with notable companies, including Algotochip Corporation. His expertise in IC design and power management has made him a valuable asset in the field of semiconductor technology.

Collaborations

Durbha has collaborated with talented individuals such as Satish Padmanabhan and Pius Ng, contributing to the advancement of integrated circuit technologies.

Conclusion

Ananth Durbha's innovative work in integrated circuit design and power management has significantly impacted the semiconductor industry. His patents reflect a commitment to enhancing efficiency and performance in custom ICs.

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