The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 16, 2013
Filed:
Oct. 18, 2010
Anand Pandurangan, Sunnyvale, CA (US);
Pius NG, Hillsboro, OR (US);
Siva Selvaraj, Sunnyvale, CA (US);
Sanjay Banerjee, San Jose, CA (US);
Ananth Durbha, San Jose, CA (US);
Suresh Kadiyala, Cupertino, CA (US);
Satish Padmanabhan, Sunnyvale, CA (US);
Anand Pandurangan, Sunnyvale, CA (US);
Pius Ng, Hillsboro, OR (US);
Siva Selvaraj, Sunnyvale, CA (US);
Sanjay Banerjee, San Jose, CA (US);
Ananth Durbha, San Jose, CA (US);
Suresh Kadiyala, Cupertino, CA (US);
Satish Padmanabhan, Sunnyvale, CA (US);
Algotochip Corp., Sunnyvale, CA (US);
Abstract
Systems and methods are disclosed to automatically generate a processor architecture for a custom integrated circuit (IC) described by a computer readable code. The IC has one or more timing and hardware constraints. The system extracts parameters defining the processor architecture from a static profile and a dynamic profile of the computer readable code; iteratively optimizes the processor architecture by changing one or more parameters until all timing and hardware constraints expressed as a cost function are met; and synthesizes the generated processor architecture into a computer readable description of the custom integrated circuit for semiconductor fabrication.