Company Filing History:

10 out of 2,490

Synopsys, Inc.

patents

4 out of 99

Virage Logic Corporation

patents

Years Active: 2006-2023

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14 patents (USPTO):Sort by Forward CitationsExplore Patents

1. 11574675 - Temperature tracked dynamic keeper implementation to enable read operations (2023-02-07),

2. 11302365 - Area efficient and high-performance wordline segmented architecture (2022-04-12),

3. 9842642 - Two phase write scheme to improve low voltage write ability in dedicated read and write port SRAM memories (2017-12-12),

4. 9281030 - Controlling timing of negative charge injection to generate reliable negative bitline voltage (2016-03-08),

5. 9001569 - Input trigger independent low leakage memory circuit (2015-04-07),

6. 8837229 - Circuit for generating negative bitline voltage (2014-09-16),

7. 8546251 - Compact read only memory cell (2013-10-01),

8. 8031542 - Low leakage ROM architecture (2011-10-04),

9. 8031541 - Low leakage ROM architecture (2011-10-04),

10. 7929347 - Compact virtual ground diffusion programmable ROM array architecture, system and method (2011-04-19),

11. 7609550 - Compact virtual ground diffusion programmable ROM array architecture, system and method (2009-10-27),

12. 7376013 - Compact virtual ground diffusion programmable ROM array architecture, system and method (2008-05-20),

13. 7301819 - ROM with a partitioned source line architecture (2007-11-27),

14. 7035129 - Partitioned source line architecture for ROM (2006-04-25),

Title: Innovator Amit Khanuja: A Pioneer in Memory Technology

Introduction: Amit Khanuja, an esteemed inventor based in New Delhi, India, has made significant contributions to the field of memory architecture. With a robust portfolio of 14 patents, he stands out for his innovative approaches to dynamic memory systems.

Latest Patents: Among his most recent advancements are two noteworthy patents. The first is a "Temperature tracked dynamic keeper implementation to enable read operations," which outlines a static random access memory (SRAM) system that adapts to temperature variations to optimize read operations. This technology incorporates a dynamic keeper with temperature-sensitive control, ensuring reliability across different thermal environments. The second patent, titled "Area efficient and high-performance wordline segmented architecture," details an intricate memory array design where memory cells are grouped into segments, enhancing both performance and efficiency.

Career Highlights: Amit Khanuja's professional journey encompasses valuable experience with two prominent companies: Synopsys, Inc. and Virage Logic Corporation. His work at these firms has reinforced his expertise in the domain of semiconductor technology and memory design, positioning him as a leader in memory innovations.

Collaborations: Throughout his career, Amit has collaborated with talented professionals, including Deepak Sabharwal and Vineet Kumar Sachan. These partnerships have facilitated the exchange of ideas and have significantly contributed to the development of innovative memory solutions.

Conclusion: In summary, Amit Khanuja's remarkable achievements in memory technology, highlighted by his patents and industry collaborations, underscore his impact as a dedicated inventor. His work not only enhances the performance of memory systems but also contributes to the advancement of technology as a whole, paving the way for future innovations.

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1 patent (EPO):

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1 patent pending (EPO):

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