Santa Clara, CA, United States of America

Ahmed Rashid Syed

This inventor holds 5 USPTO granted patents and 1 published patent application. Top assignees: Credence Systems Corporation, Credence Systems Solutions, Other. Active years: 1993-2010.

IDiyas Innovation Intelligence. (2026). Inventor Profile: Ahmed Rashid Syed. Retrieved from https://idiyas.com/inventor/ahmed-rashid-syed

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

USPTO Granted Patents = 5 

% Patents Active = 80.0

Average Co-Inventor Count = 1.1

ph-index = 3

Forward Citations = 37(Granted Patents)


Location History:

  • Los Angeles, CA (US) (1993)
  • Santa Clara, CA (US) (2007 - 2010)

Company Filing History:


Years Active: 1993-2010

Loading Chart...
5 patents (USPTO):Explore Patents

Title: Ahmed Rashid Syed: Innovator in Integrated Circuit Testing

Introduction

Ahmed Rashid Syed is a prominent inventor based in Santa Clara, CA (US). He has made significant contributions to the field of integrated circuit testing, holding a total of 5 patents. His work focuses on developing advanced test systems and methods that enhance the performance and reliability of integrated circuit devices.

Latest Patents

One of his latest patents is titled "Test systems and methods for integrated circuit devices." This invention includes a test system that features a timing generation circuit and a formatter integrated on a single CMOS (complementary metal oxide semiconductor) integrated circuit. The timing generation circuit generates software words, while the formatter processes these words to provide a specified number of transitions per second and edge placement resolution. The formatter is equipped with a drive circuit and a response circuit, each containing multiple slices that handle independent data streams.

Another notable patent is related to "Systems and methods associated with test equipment." This invention outlines a test system formatter that includes several event logic interfaces capable of receiving and decoding timing signals. It also features delay line elements (DLEs) that generate timing markers, along with drive and response logic that produce formatted levels and strobe markers in response to these timing markers. The system is designed to improve the calibration and testing of integrated circuit devices.

Career Highlights

Throughout his career, Ahmed has worked with various companies, including Credence Systems Corporation. His expertise in integrated circuit testing has positioned him as a valuable asset in the industry. He has consistently contributed to advancements in testing methodologies and technologies.

Collaborations

Ahmed has collaborated with notable professionals in his field, including Burnell G West. These partnerships have further enhanced his innovative capabilities and have led to the development of cutting-edge technologies in integrated circuit testing.

Conclusion

Ahmed Rashid Syed is a distinguished inventor whose work in integrated circuit testing has led to significant advancements in the field. His patents reflect his commitment to innovation and excellence, making him a key figure in the industry.

Profile summary based on public USPTO records.
Data Sources: USPTO Patent Grant XML, Patent Center, EPO & CIPO • Normalized by IDiyas Innovation Graph. Methodology & provenance architecturePlease report any incorrect information to [email protected]
Loading…