For the Inventor, By the Inventor

Enter assignee name

Santa Clara, CA, United States of America

Storage Technology Partners

USPTO Granted Patents = 19

Forward Citations = 618

Loading Chart...

Loading Chart...

24 inventors (with patents filed for the assignee):

John J Zasio (7 out of 28 patents)

Paul M Hug (5 out of 21 patents)

Larry Cooke (3 out of 4 patents)

4. Antonio Tavares (2 out of 2 patents)

5. Jenq-Sian Chang (1 out of 1 patent)

6. Yih-Jau Chang (1 out of 1 patent)

7. Amadeus P Rebaudo (1 out of 1 patent)

8. William C Chow (1 out of 1 patent)

9. Art J Gwerder (1 out of 1 patent)

10. Stimson F Ho (1 out of 1 patent)

11. Laurence H Cooke (1 out of 1 patent)

12. Robert A Feretich (1 out of 1 patent)

13. Richard F Boyle (1 out of 1 patent)

14. Tung S Chang (1 out of 1 patent)

15. Jenq S Chang (1 out of 1 patent)

19 patents: Sort by Forward Citations

1. 4737933 - CMOS multiport general purpose register (1988-04-12),

2. 4618779 - System for parallel power supplies (1986-10-21),

3. 4611399 - Connector pin alignment tool and method for aligning (1986-09-16),

4. 4587480 - Delay testing method for CMOS LSI and VLSI integrated circuits (1986-05-06),

5. 4572421 - Apparatus for feeding wire to a wire bonding mechanism (1986-02-25),

6. 4569248 - Coupling arm for transmitting linear motion (1986-02-11),

7. 4561584 - Integrated circuit package removal (1985-12-31),

8. 4553236 - System for detecting and correcting errors in a CMOS computer system (1985-11-12),

9. 4540903 - Scannable asynchronous/synchronous CMOS latch (1985-09-10),

10. 4526313 - Solder wave apparatus and method (1985-07-02),

11. 4516145 - Reduction of contact resistance in CMOS integrated circuit chips and the (1985-05-07),

12. 4504783 - Test fixture for providing electrical access to each I/O pin of a VLSI (1985-03-12),

13. 4495629 - CMOS scannable latch (1985-01-22),

14. 4495628 - CMOS LSI and VLSI chips having internal delay testing capability (1985-01-22),

15. 4482810 - Electron beam exposure system (1984-11-13),

Storage Technology Partners is a leading provider of storage solutions for businesses, specializing in data management, cloud storage, and disaster recovery. With a team of experts in storage technologies, STP helps companies optimize their storage infrastructure and protect their valuable data.

This text is generated by artificial intelligence and may not be accurate.

Company Badge

USPTO Data Jan 1 1976 - Dec 30 2025

19 Patents

#215 in Santa Clara, CA

#3,975 in California

#16,629 in US

#31,713 in the World

Santa Clara, CA, United States of America

Storage Technology Partners

Forward Citations = 618

24 inventors:

John J Zasio (7 out of 28 patents)

Paul M Hug (5 out of 21 patents)

Larry Cooke (3 out of 4 patents)

4. Antonio Tavares (2 out of 2 patents)

5. Jenq-Sian Chang (1 out of 1 patent)

Please report any incorrect information to support@idiyas.com

Loading…