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Santa Clara, CA, United States of America

Gradient Design Automation Inc.

USPTO Granted Patents = 14

% Expired Patents = 21.4

Forward Citations = 201

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10 inventors (with patents filed for the assignee):

Rajit Chandra (14 out of 22 patents)

Adi Srinivasan (4 out of 26 patents)

Larry Pileggi (2 out of 5 patents)

4. Peng Li (2 out of 6 patents)

5. John Yanjiang Shu (2 out of 2 patents)

6. Paolo Carnevali (2 out of 2 patents)

7. Mehdi Asheghi (2 out of 3 patents)

8. Lucio Lanza (1 out of 12 patents)

9. Daniel Rubin (1 out of 5 patents)

10. Nanda Gopal (1 out of 1 patent)

14 patents: Sort by Forward Citations

1. 8286111 - Thermal simulation using adaptive 3D and hierarchical grid mechanisms (2012-10-09),

2. 8082137 - Method and apparatus for thermal modeling and analysis of semiconductor chip designs (2011-12-20),

3. 8019580 - Transient thermal analysis (2011-09-13),

4. 7823102 - Thermally aware design modification (2010-10-26),

5. 7590958 - Method and apparatus for retrofitting semiconductor chip performance analysis tools with full-chip thermal analysis capabilities (2009-09-15),

6. 7587692 - Method and apparatus for full-chip thermal analysis of semiconductor chip designs (2009-09-08),

7. 7472363 - Semiconductor chip design having thermal awareness across multiple sub-system domains (2008-12-30),

8. 7458052 - Method and apparatus for normalizing thermal gradients over semiconductor chip designs (2008-11-25),

9. 7401304 - Method and apparatus for thermal modeling and analysis of semiconductor chip designs (2008-07-15),

10. 7383520 - Method and apparatus for optimizing thermal management system performance using full-chip thermal analysis of semiconductor chip designs (2008-06-03),

11. 7353471 - Method and apparatus for using full-chip thermal analysis of semiconductor chip designs to compute thermal conductance (2008-04-01),

12. 7203920 - Method and apparatus for retrofitting semiconductor chip performance analysis tools with full-chip thermal analysis capabilities (2007-04-10),

13. 7194711 - Method and apparatus for full-chip thermal analysis of semiconductor chip designs (2007-03-20),

14. 7191413 - Method and apparatus for thermal testing of semiconductor chip designs (2007-03-13),

Gradient Design Automation Inc. is a technology company based in Santa Clara, California, specializing in advanced design automation solutions for the semiconductor industry. The company focuses on developing innovative software tools that enhance the efficiency and effectiveness of electronic design processes. By leveraging cutting-edge algorithms and methodologies, Gradient aims to streamline workflows and improve design outcomes for integrated circuits and systems, catering to the evolving needs of engineers and designers in a competitive market.

Profile summary based on public USPTO records.

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USPTO Data Jan 1 1976 - Oct 6 2026

14 Patents

#218 in Santa Clara, CA

#5,317 in California

#22,302 in US

#42,199 in the World

Santa Clara, CA, United States of America

Gradient Design Automation Inc.

Forward Citations = 201

10 inventors:

Rajit Chandra (14 out of 22 patents)

Adi Srinivasan (4 out of 26 patents)

Larry Pileggi (2 out of 5 patents)

4. Peng Li (2 out of 6 patents)

5. John Yanjiang Shu (2 out of 2 patents)

Please report any incorrect information to [email protected]

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