The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 20, 2011

Filed:

Jun. 11, 2008
Applicants:

Peng LI, College Station, TX (US);

Larry Pileggi, Pittsburgh, PA (US);

Mehdi Asheghi, Pittsburgh, PA (US);

Rajit Chandra, Cupertino, CA (US);

Inventors:

Peng Li, College Station, TX (US);

Larry Pileggi, Pittsburgh, PA (US);

Mehdi Asheghi, Pittsburgh, PA (US);

Rajit Chandra, Cupertino, CA (US);

Assignee:

Gradient Design Automation, Inc., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 17/50 (2006.01); G06F 11/22 (2006.01);
U.S. Cl.
CPC ...
Abstract

A method and apparatus for modeling and thermal analysis of semiconductor chip designs is provided. One embodiment of a novel method for performing thermal testing of a semiconductor chip design includes calculating full-chip temperatures over the semiconductor chip design (e.g., to identify steep thermal gradients) and modeling the full-chip temperatures in accordance with a geometric multi-grid technique. The geometric multi-grid technique is tailored to determine temperatures within the semiconductor chip design based at least in part on the physical attributes or geometry of the design.


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