The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 23, 2018

Filed:

Nov. 21, 2016
Applicant:

Xintec Inc., Taoyuan, TW;

Inventors:

Yen-Shih Ho, Kaohsiung, TW;

Hsiao-Lan Yeh, Tainan, TW;

Chia-Sheng Lin, Taoyuan, TW;

Yi-Ming Chang, Taoyuan, TW;

Po-Han Lee, Taipei, TW;

Hui-Hsien Wu, Taoyuan, TW;

Jyun-Liang Wu, Taichung, TW;

Assignee:

XINTEC INC., Taoyuan, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/52 (2006.01); H01L 29/40 (2006.01); H01L 21/56 (2006.01); H01L 21/683 (2006.01); H01L 21/78 (2006.01); G06K 9/00 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 21/561 (2013.01); G06K 9/0004 (2013.01); H01L 21/6836 (2013.01); H01L 21/78 (2013.01); H01L 23/3114 (2013.01); H01L 23/481 (2013.01); H01L 2224/16225 (2013.01);
Abstract

A chip package includes a chip, a first adhesive layer, a second adhesive layer, and a protection cap. The chip has a sensing area, a first surface, a second surface that is opposite to the first surface, and a side surface adjacent to the first and second surfaces. The sensing area is located on the first surface. The first adhesive layer covers the first surface of the chip. The second adhesive layer is located on the first adhesive layer, such that the first adhesive layer is between the first surface and the second adhesive layer. The protection cap has a bottom board and a sidewall that surrounds the bottom board. The bottom board covers the second adhesive layer, and the sidewall covers the side surface of the chip.


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