Taichung, Taiwan

Jyun-Liang Wu


Average Co-Inventor Count = 8.2

ph-index = 1

Forward Citations = 1(Granted Patents)


Company Filing History:


Years Active: 2018

Loading Chart...
2 patents (USPTO):

Title: Jyun-Liang Wu: Innovator in Chip Packaging Technology

Introduction

Jyun-Liang Wu is a prominent inventor based in Taichung, Taiwan. He has made significant contributions to the field of chip packaging technology. With a total of 2 patents to his name, Wu continues to push the boundaries of innovation in this critical area of electronics.

Latest Patents

Wu's latest patents include innovative designs for chip packages. The first patent describes a chip package that consists of a chip, an adhesive layer, and a dam element. The chip features a sensing area located on its first surface, while the dam element surrounds this area, ensuring optimal performance. The thickness of the dam element ranges from 20 μm to 750 μm, with a rough surface that enhances its functionality.

The second patent also focuses on chip packaging, detailing a design that includes a chip, a first adhesive layer, a second adhesive layer, and a protection cap. This design ensures that the first adhesive layer is sandwiched between the chip's first surface and the second adhesive layer. The protection cap effectively covers the second adhesive layer and the side surface of the chip, providing additional protection and stability.

Career Highlights

Jyun-Liang Wu is currently employed at Xintec Corporation, where he applies his expertise in chip packaging technology. His work has been instrumental in advancing the company's capabilities in this competitive field. Wu's innovative designs have not only contributed to the company's success but have also set new standards in the industry.

Collaborations

Wu collaborates with talented colleagues, including Yen-Shih Ho and Hsiao-Lan Yeh. Their combined efforts foster a creative environment that encourages innovation and the development of cutting-edge technologies.

Conclusion

Jyun-Liang Wu is a key figure in the realm of chip packaging technology, with a focus on innovative designs that enhance performance and reliability. His contributions through patents and collaboration with skilled professionals continue to shape the future of electronics.

This text is generated by artificial intelligence and may not be accurate.
Please report any incorrect information to support@idiyas.com
Loading…