The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 26, 2017
Filed:
Oct. 07, 2015
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Yu-Sheng Chang, Taipei, TW;
Cheng-Hsiung Tsai, Zhunan Township, TW;
Chung-Ju Lee, Hsin-Chu, TW;
Hai-Ching Chen, Hsin-Chu, TW;
Hsiang-Huan Lee, Jhudong Township, TW;
Ming-Feng Shieh, Yongkang, TW;
Ru-Gun Liu, Zhubei, TW;
Shau-Lin Shue, Hsin-Chu, TW;
Tien-I Bao, Dayuan Township, TW;
Tsai-Sheng Gau, Hsin-Chu, TW;
Yung-Hsu Wu, Taipei, TW;
Taiwan Semiconductor Manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
A method embodiment for patterning a semiconductor device includes patterning a dummy layer over a hard mask to form one or more dummy lines. A sidewall aligned spacer is conformably formed over the one or more dummy lines and the hard mask. A first reverse material layer is formed over the sidewall aligned spacer. A first photoresist is formed and patterned over the first reverse material layer. The first reverse material layer using the first photoresist as a mask, wherein the sidewall aligned spacer is not etched. The one or more dummy lines are removed, and the hard mask is patterned using the sidewall aligned spacer and the first reverse material layer as a mask. A material used for forming the sidewall aligned spacer has a higher selectivity than a material used for forming the first reverse material layer.