The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 28, 2017

Filed:

Jul. 13, 2016
Applicants:

Roza Kotlyar, Portland, OR (US);

Stephen M. Cea, Hillsboro, OR (US);

Gilbert Dewey, Hillsboro, OR (US);

Benjamin Chu-kung, Hillsboro, OR (US);

Uygar E. Avci, Portland, OR (US);

Rafael Rios, Portland, OR (US);

Anurag Chaudhry, Portland, OR (US);

Thomas D. Linton, Jr., San Jose, CA (US);

Ian A. Young, Portland, OR (US);

Kelin J. Kuhn, Aloha, OR (US);

Inventors:

Roza Kotlyar, Portland, OR (US);

Stephen M. Cea, Hillsboro, OR (US);

Gilbert Dewey, Hillsboro, OR (US);

Benjamin Chu-Kung, Hillsboro, OR (US);

Uygar E. Avci, Portland, OR (US);

Rafael Rios, Portland, OR (US);

Anurag Chaudhry, Portland, OR (US);

Thomas D. Linton, Jr., San Jose, CA (US);

Ian A. Young, Portland, OR (US);

Kelin J. Kuhn, Aloha, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/739 (2006.01); H01L 29/16 (2006.01); H01L 29/161 (2006.01); H01L 29/06 (2006.01); H01L 29/24 (2006.01); H01L 29/267 (2006.01); H01L 27/092 (2006.01); H01L 29/04 (2006.01); H01L 29/10 (2006.01); H01L 29/165 (2006.01); H01L 29/20 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 29/66977 (2013.01); H01L 27/092 (2013.01); H01L 29/045 (2013.01); H01L 29/068 (2013.01); H01L 29/0676 (2013.01); H01L 29/1054 (2013.01); H01L 29/16 (2013.01); H01L 29/161 (2013.01); H01L 29/165 (2013.01); H01L 29/20 (2013.01); H01L 29/24 (2013.01); H01L 29/267 (2013.01); H01L 29/42392 (2013.01); H01L 29/7391 (2013.01); H01L 29/785 (2013.01); H01L 29/7842 (2013.01); H01L 29/78603 (2013.01); H01L 29/78642 (2013.01); H01L 29/78684 (2013.01); H01L 29/78696 (2013.01);
Abstract

Tunneling field effect transistors (TFETs) for CMOS architectures and approaches to fabricating N-type and P-type TFETs are described. For example, a tunneling field effect transistor (TFET) includes a homojunction active region disposed above a substrate. The homojunction active region includes a relaxed Ge or GeSn body having an undoped channel region therein. The homojunction active region also includes doped source and drain regions disposed in the relaxed Ge or GeSn body, on either side of the channel region. The TFET also includes a gate stack disposed on the channel region, between the source and drain regions. The gate stack includes a gate dielectric portion and gate electrode portion.


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