The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 27, 2016

Filed:

Jul. 23, 2015
Applicant:

Tokyo Electron Limited, Tokyo, JP;

Inventors:

Jason Marion, Glenville, NY (US);

Sonam Sherpa, Fishkill, NY (US);

Sergey A. Voronin, Delmar, NY (US);

Alok Ranjan, Mechanicville, NY (US);

Yoshio Ishikawa, Miyagi, JP;

Takashi Enomoto, Miyagi, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
C03C 15/00 (2006.01); H01J 37/32 (2006.01); H01L 21/683 (2006.01);
U.S. Cl.
CPC ...
H01J 37/32697 (2013.01); H01J 37/32422 (2013.01); H01J 37/32706 (2013.01); H01J 37/32715 (2013.01); H01L 21/6833 (2013.01);
Abstract

A plasma processing method and apparatus are provided in which current spikes associated with application of a voltage to an electrostatic chuck (ESC) are minimized or reduced when the processing plasma is present. According to an example, the voltage is applied to the ESC after the processing plasma is struck, however the voltage is ramped or increased in a step-wise manner to achieve the desired final ESC voltage. In an alternate embodiment, the ESC voltage is at least partially applied before striking of the plasma for processing the wafer. By reducing current spikes associated with application of the voltage to the ESC during the presence of the processing plasma, transfer or deposition of particles on the wafer can be reduced.


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