The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 31, 2016
Filed:
Apr. 01, 2014
Globalfoundries Inc., Grand Cayman, KY;
Edward C. Cooney, III, Jericho, VT (US);
James S. Dunn, Jericho, VT (US);
Dale W. Martin, Hyde Park, VT (US);
Charles S. Musante, South Burlington, VT (US);
BethAnn Rainey Lawrence, Williston, VT (US);
Leathen Shi, Yorktown Heights, NY (US);
Edmund J. Sprogis, Williston, VT (US);
Cornelia K. Tsang, Mohegan Lake, NY (US);
GLOBALFOUNDRIES INC., Grand Cayman, KY;
Abstract
Methods for bonding substrate surfaces, bonded substrate assemblies, and design structures for a bonded substrate assembly. Device structures of a product chip are formed using a first surface of a device substrate. A wiring layer of an interconnect structure for the device structures is formed on the product chip. The wiring layer is planarized. A temporary handle wafer is removably bonded to the planarized wiring layer. In response to removably bonding the temporary handle wafer to the planarized first wiring layer, a second surface of the device substrate, which is opposite to the first surface, is bonded to a final handle substrate. The temporary handle wafer is then removed from the assembly.