The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 17, 2016

Filed:

Jun. 19, 2014
Applicant:

Siliconware Precision Industries Co., Ltd., Taichung, TW;

Inventors:

Lung-Yuan Wang, Taichung, TW;

Cheng-Chia Chiang, Taichung, TW;

Chu-Chi Hsu, Taichung, TW;

Chia-Kai Shih, Taichung, TW;

Shu-Huei Huang, Taichung, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 33/00 (2010.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01); H01L 25/10 (2006.01); H01L 25/00 (2006.01); H01L 23/31 (2006.01); H01L 23/498 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 24/19 (2013.01); H01L 21/568 (2013.01); H01L 24/96 (2013.01); H01L 25/105 (2013.01); H01L 25/50 (2013.01); H01L 23/3128 (2013.01); H01L 23/49811 (2013.01); H01L 23/5389 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/16225 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32225 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48227 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/73265 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06562 (2013.01); H01L 2225/1023 (2013.01); H01L 2225/1035 (2013.01); H01L 2225/1041 (2013.01); H01L 2225/1058 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/15311 (2013.01);
Abstract

A method for fabricating a semiconductor package is provided, which includes the steps of: providing a first substrate having a plurality of first conductive posts on a surface thereof and providing a second substrate having a third surface having a chip disposed thereon and a fourth surface opposite to the third surface; disposing the first substrate on the third surface of the second substrate through the first conductive posts; forming an encapsulant between the first substrate and the second substrate, wherein the encapsulant has a first surface adjacent to the first substrate and a second surface opposite to the first surface; and removing the first substrate, thereby effectively preventing solder bridging from occurring.


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