The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2016

Filed:

Mar. 19, 2014
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Chia-Pin Chiu, Tempe, AZ (US);

Kinya Ichikawa, Tsukuba, JP;

Yoshihiro Tomita, Tsukuba, JP;

Robert L. Sankman, Phoenix, AZ (US);

Eric Li, Chandler, AZ (US);

Assignee:

Intel Corporation, Santa Clara, MN (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/4763 (2006.01); H01L 21/768 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2006.01); H01L 23/00 (2006.01); H01L 21/56 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76885 (2013.01); H01L 21/565 (2013.01); H01L 21/7685 (2013.01); H01L 24/03 (2013.01); H01L 24/11 (2013.01); H01L 24/81 (2013.01); H01L 25/0657 (2013.01); H01L 25/50 (2013.01); H01L 2224/81801 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/06548 (2013.01); H01L 2225/06555 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/06 (2013.01); H01L 2924/381 (2013.01);
Abstract

A method of fabricating an electronic package. The method includes filling a mold with an electric conductor to form a number of electrical interconnects within the mold. The mold includes openings that are filled with several electric conductors to form a number of electrical interconnects. The method of fabricating an electronic package further includes attaching the mold to a substrate such that the electrical interconnects engage electrical contacts on the substrate. The method of fabricating an electronic package may further include forming conductive pads on the electrical insulator that engage the electrical interconnects and attaching a die to the substrate such that the die is electrically connected to at least some of the electrical interconnects.


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