The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2015

Filed:

May. 09, 2014
Applicants:

Kelin J. Kuhn, Aloha, OR (US);

Seiyon Kim, Portland, OR (US);

Rafael Rios, Portland, OR (US);

Stephen M. Cea, Hillsboro, OR (US);

Martin D. Giles, Portland, OR (US);

Annalisa Cappellani, Portland, OR (US);

Titash Rakshit, Hillsboro, OR (US);

Peter Chang, Portland, OR (US);

Willy Rachmady, Beaverton, OR (US);

Inventors:

Kelin J. Kuhn, Aloha, OR (US);

Seiyon Kim, Portland, OR (US);

Rafael Rios, Portland, OR (US);

Stephen M. Cea, Hillsboro, OR (US);

Martin D. Giles, Portland, OR (US);

Annalisa Cappellani, Portland, OR (US);

Titash Rakshit, Hillsboro, OR (US);

Peter Chang, Portland, OR (US);

Willy Rachmady, Beaverton, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/165 (2006.01); H01L 29/06 (2006.01); B82Y 10/00 (2011.01); H01L 21/762 (2006.01); H01L 29/16 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 29/66 (2006.01); H01L 29/775 (2006.01); H01L 29/78 (2006.01); H01L 29/786 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0673 (2013.01); B82Y 10/00 (2013.01); H01L 21/76224 (2013.01); H01L 29/0676 (2013.01); H01L 29/16 (2013.01); H01L 29/165 (2013.01); H01L 29/41733 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/66742 (2013.01); H01L 29/66795 (2013.01); H01L 29/775 (2013.01); H01L 29/785 (2013.01); H01L 29/7848 (2013.01); H01L 29/78618 (2013.01); H01L 29/78654 (2013.01); H01L 29/78684 (2013.01); H01L 29/78696 (2013.01);
Abstract

Methods of forming microelectronic structures are described. Embodiments of those methods include forming a nanowire device comprising a substrate comprising source/drain structures adjacent to spacers, and nanowire channel structures disposed between the spacers, wherein the nanowire channel structures are vertically stacked above each other.


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