The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Nov. 04, 2014
Filed:
Aug. 01, 2011
Chia-ming Hung, Taipei, TW;
Hung-sen Wang, Guantian Shiang, TW;
Hsiang-fu Chen, Jhudong Township, Hsinchu County, TW;
Te-hsi Lee, Taipei, TW;
Alex Kalnitsky, San Francisco, CA (US);
Wen-chuan Tai, Dayuan Township, Taoyuan County, TW;
Kuei-sung Chang, Kaohsiung, TW;
Yi Heng Tsai, Hsinchu, TW;
Chia-Ming Hung, Taipei, TW;
Hung-Sen Wang, Guantian Shiang, TW;
Hsiang-Fu Chen, Jhudong Township, Hsinchu County, TW;
Te-Hsi Lee, Taipei, TW;
Alex Kalnitsky, San Francisco, CA (US);
Wen-Chuan Tai, Dayuan Township, Taoyuan County, TW;
Kuei-Sung Chang, Kaohsiung, TW;
Yi Heng Tsai, Hsinchu, TW;
Taiwan Semiconductor manufacturing Company, Ltd., Hsin-Chu, TW;
Abstract
An apparatus including a bypass structure for complementary metal-oxide-semiconductor (CMOS) and/or microelectromechanical system (MEMS) devices, and method for fabricating such apparatus, is disclosed. An exemplary apparatus includes a first substrate; a second substrate that includes a MEMS device; an insulator disposed between the first substrate and the second substrate; and an electrical bypass structure disposed in the insulator layer that contacts a portion of the first substrate, wherein the electrical bypass structure is electrically isolated from the MEMS device in the second substrate and any device included in the first substrate.