The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 06, 2014
Filed:
Mar. 15, 2007
Lee Wee Teo, Singapore, SG;
Yong Meng Lee, Singapore, SG;
Zhao Lun, Singapore, SG;
Chung Woh Lai, Singapore, SG;
Shyue Seng Tan, Singapore, SG;
Jeffrey Chee, Singapore, SG;
Shailendra Mishra, Singapore, SG;
Johnny Widodo, Singapore, SG;
Lee Wee Teo, Singapore, SG;
Yong Meng Lee, Singapore, SG;
Zhao Lun, Singapore, SG;
Chung Woh Lai, Singapore, SG;
Shyue Seng Tan, Singapore, SG;
Jeffrey Chee, Singapore, SG;
Shailendra Mishra, Singapore, SG;
Johnny Widodo, Singapore, SG;
Globalfoundries Singapore Pte. Ltd., Singapore, SG;
Abstract
A method and structure for a memory device, such as a 1T-SRAM, having a capacitor top plate directly over a doped bottom plate region. An example device comprises the following. An isolation film formed as to surround an active area on a substrate. A gate dielectric and gate electrode formed over a portion of the active area. A source element and a drain element in the substrate adjacent to the gate electrode. The drain element is comprised of a drain region and a bottom plate region. The drain region is between the bottom plate region and the gate structure. A capacitor dielectric and a capacitor top plate are over at least portions of the bottom plate region.