The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 25, 2014
Filed:
Jun. 18, 2012
Chin-tang Hsieh, Kaohsiung, TW;
Chih-ming Kuo, Hsinchu, TW;
Chia-jung Tu, Hsinchu, TW;
Shih-chieh Chang, Chiayi County, TW;
Chih-hsien NI, Hsinchu, TW;
Lung-hua Ho, Hsinchu, TW;
Chaun-yu Wu, Hsinchu, TW;
Kung-an Lin, Hsinchu, TW;
Chin-Tang Hsieh, Kaohsiung, TW;
Chih-Ming Kuo, Hsinchu, TW;
Chia-Jung Tu, Hsinchu, TW;
Shih-Chieh Chang, Chiayi County, TW;
Chih-Hsien Ni, Hsinchu, TW;
Lung-Hua Ho, Hsinchu, TW;
Chaun-Yu Wu, Hsinchu, TW;
Kung-An Lin, Hsinchu, TW;
Chipbond Technology Corporation, Hsinchu, TW;
Abstract
A semiconductor package structure includes a first substrate, a second substrate and an encapsulant. The first substrate comprises a plurality of first bumps and a plurality of first solder layers. Each of the first solder layers is formed on each of the first bumps and comprises a cone-shaped slot having an inner surface. The second substrate comprises a plurality of second bumps and a plurality of second solder layers. Each of the second solder layers is formed on each of the second bumps and comprises an outer surface. Each of the second solder layers is a cone-shaped body. The second solder layer couples to the first solder layer and is accommodated within the first solder layer. The inner surface of the cone-shaped slot contacts with the outer surface of the second solder layer. The encapsulant is formed between the first substrate and the second substrate.