The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 20, 2009
Filed:
Oct. 13, 2005
Jonathan D. Reid, Sherwood, OR (US);
Eric G. Webb, West Linn, OR (US);
Edmund B. Minshall, Sherwood, OR (US);
Avishai Kepten, Lake Oswego, OR (US);
R. Marshall Stowell, Wilsonville, OR (US);
Steven T. Mayer, Lake Oswego, OR (US);
Jonathan D. Reid, Sherwood, OR (US);
Eric G. Webb, West Linn, OR (US);
Edmund B. Minshall, Sherwood, OR (US);
Avishai Kepten, Lake Oswego, OR (US);
R. Marshall Stowell, Wilsonville, OR (US);
Steven T. Mayer, Lake Oswego, OR (US);
Novellus Systems, Inc., San Jose, CA (US);
Abstract
Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.