The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 21, 2007
Filed:
Jun. 01, 2005
Deenesh Padhi, Sunnyvale, CA (US);
Ganesh Balasubramanian, Sunnyvale, CA (US);
Annamalai Lakshmanan, Santa Clara, CA (US);
Zhenjiang Cui, San Jose, CA (US);
Juan Carlos Rocha-alvarez, Sunnyvale, CA (US);
Bok Hoen Kim, San Jose, CA (US);
Hichem M'saad, Santa Clara, CA (US);
Steven Reiter, Poughkeepsie, NY (US);
Francimar Schmitt, Santa Clara, CA (US);
Deenesh Padhi, Sunnyvale, CA (US);
Ganesh Balasubramanian, Sunnyvale, CA (US);
Annamalai Lakshmanan, Santa Clara, CA (US);
Zhenjiang Cui, San Jose, CA (US);
Juan Carlos Rocha-Alvarez, Sunnyvale, CA (US);
Bok Hoen Kim, San Jose, CA (US);
Hichem M'Saad, Santa Clara, CA (US);
Steven Reiter, Poughkeepsie, NY (US);
Francimar Schmitt, Santa Clara, CA (US);
Applied Materials, Inc., Santa Clara, CA (US);
Abstract
A method of depositing a organosilicate dielectric layer exhibiting high adhesion strength to an underlying substrate disposed within a single processing chamber without plasma arcing. The method includes positioning a substrate within a processing chamber having a powered electrode, flowing an interface gas mixture into the processing chamber, the interface gas mixture comprising one or more organosilicon compounds and one or more oxidizing gases, depositing a silicon oxide layer on the substrate by varying process conditions, wherein DC bias of the powered electrode varies less than 60 volts.