The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 05, 2007
Filed:
Oct. 12, 2004
Paul Sullivan, Campbell, CA (US);
George Kren, Los Altos Hills, CA (US);
Eliezer Rosengaus, Palo Alto, CA (US);
Patrick Huet, San Jose, CA (US);
Robinson Piramuthu, San Jose, CA (US);
Martin Plihal, Pleasanton, CA (US);
Yan Xiong, Sunnyvale, CA (US);
Paul Sullivan, Campbell, CA (US);
George Kren, Los Altos Hills, CA (US);
Eliezer Rosengaus, Palo Alto, CA (US);
Patrick Huet, San Jose, CA (US);
Robinson Piramuthu, San Jose, CA (US);
Martin Plihal, Pleasanton, CA (US);
Yan Xiong, Sunnyvale, CA (US);
KLA-Tencor Technologies Corp., Milpitas, CA (US);
Abstract
Wafer inspection systems and methods are provided. One inspection system includes a module measurement cell coupled to a host inspection system by a wafer handler. The module measurement cell is configured to inspect a wafer using one or more modes prior to inspection of the wafer by the host inspection system. The one or more modes include backside inspection, edge inspection, frontside macro defect inspection, or a combination thereof. Another inspection system includes two or more low resolution electronic sensors arranged at multiple viewing angles. The sensors are configured to detect light returned from a wafer substantially simultaneously. A method for analyzing inspection data includes selecting a template corresponding to a support device that contacts a backside of a wafer prior to inspection of the backside of the wafer. The method also includes subtracting data representing the template from inspection data generated by inspection of the backside of the wafer.