The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 22, 2005
Filed:
Jan. 30, 2004
Keisuke Suzuki, Tokyo-to, JP;
Toshiyuki Ikeuchi, Tokyo-to, JP;
Kimiya Aoki, Tokyo-to, JP;
David Paul Brunco, San Jose, CA (US);
Steven Robert Soss, San Jose, CA (US);
Anthony Dip, Cedar Creek, TX (US);
Keisuke Suzuki, Tokyo-to, JP;
Toshiyuki Ikeuchi, Tokyo-to, JP;
Kimiya Aoki, Tokyo-to, JP;
David Paul Brunco, San Jose, CA (US);
Steven Robert Soss, San Jose, CA (US);
Anthony Dip, Cedar Creek, TX (US);
Tokyo Electron Limited, Tokyo-To, JP;
Intel Corporation, Santa Clara, CA (US);
Abstract
A method of oxidizing work pieces according to the present invention comprises the steps of: containing a plurality of work pieces W in a processing vesselwhich has a predetermined length and is capable forming a vacuum therein, oxidizing surfaces of the work pieces in an atmosphere including active oxygen species and active hydroxyl species which are generated by supplying an oxidative gas and a reductive gas into the processing vessel to interact the gases. The oxidative gas and the reductive gas are respectively supplied into the processing vessel in the longitudinal direction. Parts of the reductive gas are additionally supplied from at least two or more independently controlled gas nozzles located at separate locations in the longitudinal direction of the processing vessel. The gas flow rate through each nozzle is set depending on any combination of the work pieces composed of product wafers, dummy wafers, and monitor wafers in the processing vessel.