The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Oct. 22, 2002
Filed:
Jan. 02, 2002
Applicant:
Inventors:
Chew-Hoe Ang, Singapore, SG;
Eng-Hua Lim, S'Por, SG;
Randall Cher Liang Cha, Singapore, SG;
Jia-Zhen Zheng, Singapore, SG;
Elgin Kiok Boone Quek, Singapore, SG;
Mei-Sheng Zhou, Singapore, SG;
Daniel Lee-Wei Yen, Singapore, SG;
Assignee:
Chartered Semiconductor Manufacturing Ltd., Singapore, SG;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 2/18238 ;
U.S. Cl.
CPC ...
H01L 2/18238 ;
Abstract
A method of fabricating a dual gate electrode CMOS device having dual gate electrodes. An N+ poly gate is used for the nMOSFET and a metal gate is used for the pMOSFET. The N+ nMOSFET poly gate may be capped with a highly conductive metal to reduce its gate resistance. A sacrificial cap is used for the N+ poly gate to eliminate a mask level for the dual gate electrodes.