The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 01, 2001
Filed:
Mar. 12, 1996
Panayotis Constantinou Andricacos, Croton-on-Hudson, NY (US);
Madhav Datta, Yorktown Heights, NY (US);
Hariklia Deligianni, Edgewater, NJ (US);
Wilma Jean Horkans, Ossining, NY (US);
Sung Kwon Kang, Chappaqua, NY (US);
Keith Thomas Kwietniak, Highland Falls, NY (US);
Gangadhara Swami Mathad, Poughkeepsie, NY (US);
Sampath Purushothaman, Yorktown Heights, NY (US);
Leathen Shi, Yorktown Heights, NY (US);
Ho-Ming Tong, Taipei, TW;
International Business Machines Corporation, Armonk, NY (US);
Abstract
An interconnection structure suitable for the connection of microelectronic circuit chips to packages is provided by this invention. In particular, the invention pertains to the area-array or flip-chip technology often called C4 (controlled collapse chip connection). The structure comprises an adhesion/barrier layer deposited on a passivated substrate (e.g., a silicon wafer), optionally an additional adhesion layer, a solderable layer of a metal selected from the group consisting of Ni, Co, Fe, NiFe, NiCo, CoFe and NiCoFe on the adhesion/barrier layer, and a lead-free solder ball comprising tin as the predominate component and one or more alloying elements selected from Bi, Ag, and Sb, and further optionally including one or more elements selected from the group consisting of Zn, In, Ni, Co and Cu.