The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 08, 2026

Filed:

May. 05, 2023
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Abhishek A. Sharma, Portland, OR (US);

Sagar Suthram, Portland, OR (US);

Kimberly L. Pierce, Beaverton, OR (US);

Elliot Tan, Portland, OR (US);

Pushkar Sharad Ranade, San Jose, CA (US);

Shem Odhiambo Ogadhoh, West Linn, OR (US);

Wilfred Gomes, Portland, OR (US);

Anand S. Murthy, Portland, OR (US);

Swaminathan Sivakumar, Beaverton, OR (US);

Tahir Ghani, Portland, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10B 10/00 (2023.01); G11C 5/06 (2006.01); G11C 7/18 (2006.01);
U.S. Cl.
CPC ...
H10B 10/125 (2023.02); G11C 5/063 (2013.01); G11C 7/18 (2013.01);
Abstract

SRAM devices with angled transistors, and related assemblies and methods, are disclosed herein. A transistor is referred to as 'angled' if a longitudinal axis of an elongated semiconductor structure (e.g., a fin or a nanoribbon) based on which the transistor is built is at an angle other than 0 degrees or 90 degrees with respect to the edges of front or back faces of a support structure or a die on/in which the transistor resides, e.g., at an angle between about 10 and 80 degrees with respect to at least one of such edges. Implementing at least some of the transistors of SRAM cells as angled transistors may provide a promising way to increasing densities of SRAM cells on the limited real estate of semiconductor chips.


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