Beaverton, OR, United States of America

Kimberly L Pierce

USPTO Granted Patents = 4 

Average Co-Inventor Count = 6.0

ph-index = 1


Company Filing History:


Years Active: 2024-2025

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4 patents (USPTO):Explore Patents

Title: Innovations of Kimberly L. Pierce

Introduction

Kimberly L. Pierce is a notable inventor based in Beaverton, Oregon. She has made significant contributions to the field of memory architecture and embedded DRAM technology. With a total of two patents to her name, her work has had a substantial impact on the industry.

Latest Patents

Her latest patents include "Multilevel wordline assembly for embedded DRAM" and "Memory architecture with shared bitline at back-end-of-line." The first patent describes a device structure that features a first interconnect line and a second interconnect line, with transistors and capacitors arranged in a specific configuration. The second patent outlines techniques for a memory device that includes two memory cells, each with its own storage cell and transistor, sharing a contact electrode for efficient operation.

Career Highlights

Kimberly is currently employed at Intel Corporation, where she continues to innovate and develop advanced memory technologies. Her work at Intel has positioned her as a key player in the field of semiconductor research and development.

Collaborations

She has collaborated with notable colleagues such as Travis W. LaJoie and Abhishek A. Sharma, contributing to various projects that enhance the capabilities of memory devices.

Conclusion

Kimberly L. Pierce's contributions to the field of technology through her patents and work at Intel Corporation highlight her role as an influential inventor. Her innovations continue to shape the future of memory architecture and embedded systems.

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