The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 14, 2026

Filed:

Jul. 07, 2021
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Bok Eng Cheah, Gelugor Pulau Pinang, MY;

Seok Ling Lim, Kulim Kedah, MY;

Jenny Shio Yin Ong, Bayan Lepas Pulau Pinang, MY;

Jackson Chung Peng Kong, Tanjung Tokong Pulau Pinang, MY;

Kooi Chi Ooi, Gelugor Pulau Pinang, MY;

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/538 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01); H01L 23/13 (2006.01); H01L 25/00 (2006.01); H01L 25/065 (2023.01);
U.S. Cl.
CPC ...
H01L 23/5386 (2013.01); H01L 21/4853 (2013.01); H01L 21/4857 (2013.01); H01L 23/13 (2013.01); H01L 23/5383 (2013.01); H01L 23/5385 (2013.01); H01L 24/16 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 2224/16157 (2013.01); H01L 2225/06517 (2013.01); H01L 2225/0652 (2013.01); H01L 2225/06558 (2013.01); H01L 2225/06572 (2013.01); H01L 2924/1205 (2013.01); H01L 2924/1206 (2013.01); H01L 2924/1207 (2013.01); H01L 2924/1427 (2013.01); H01L 2924/1431 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/19106 (2013.01);
Abstract

The present disclosure relates to a semiconductor package that may include a package substrate with a first surface and an opposing second surface, a first device coupled to the first surface of the package substrate, a redistribution frame coupled to the second surface of the package substrate, a plurality of solder balls coupled to the second surface of the package substrate, a second device coupled to the redistribution frame, and a printed circuit board coupled to the plurality of solder balls on the second surface of substrate, wherein the redistribution frame coupled with the second device and the plurality of solder balls are positioned between the package substrate and the printed circuit board.


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