The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Oct. 21, 2025

Filed:

Apr. 26, 2021
Applicant:

No.24 Research Institute of China Electronics Technology Group Corporation, Chongqing, CN;

Inventors:

Kaizhou Tan, Chongqing, CN;

Tian Xiao, Chongqing, CN;

Jiahao Zhang, Chongqing, CN;

Yonghui Yang, Chongqing, CN;

Xiaoquan Li, Chongqing, CN;

Pengfei Wang, Chongqing, CN;

Ying Pei, Chongqing, CN;

Guangbo Li, Chongqing, CN;

Hequan Jiang, Chongqing, CN;

Peijian Zhang, Chongqing, CN;

Sheng Qiu, Chongqing, CN;

Liang Chen, Chongqing, CN;

Wei Cui, Chongqing, CN;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 64/00 (2025.01); H10D 30/01 (2025.01); H10D 30/66 (2025.01); H10D 62/10 (2025.01);
U.S. Cl.
CPC ...
H10D 64/115 (2025.01); H10D 30/0297 (2025.01); H10D 30/665 (2025.01); H10D 30/668 (2025.01); H10D 62/102 (2025.01); H10D 64/117 (2025.01);
Abstract

The MOS device with resistive field plate for realizing conductance modulation field effect in the present invention is based on the existing trench gate MOS device, and a semi-insulating resistive field plate electrically connected to the trench gate structure and the drain structure is added in the drift region, where the trench gate structure can control the on-off of the MOS channel, and the semi-insulating resistive field plate can adjust the doping concentration of the drift region to modulate the conductance of the on-state drift region and the distribution of off-state high-voltage blocking electric field, thus a lower on-resistance can be obtained. In addition, the modern 2.5-dimensional processing technology based on deep trench etching is adopted in the present invention, which is conducive to the miniaturization design and high density design of the structure and is more suitable for the More than Moore (beyond Moore) development of modern integrated semiconductor devices.


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