The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 01, 2025
Filed:
Dec. 22, 2021
Intel Corporation, Santa Clara, CA (US);
Gurpreet Singh, Portland, OR (US);
Nityan Labros Nair, Portland, OR (US);
Nafees A. Kabir, Portland, OR (US);
Eungnak Han, Portland, OR (US);
Xuanxuan Chen, Hillsboro, OR (US);
Brandon Jay Holybee, Portland, OR (US);
Charles Henry Wallace, Portland, OR (US);
Paul A. Nyhus, Portland, OR (US);
Manish Chandhok, Beaverton, OR (US);
Florian Gstrein, Portland, OR (US);
David Nathan Shykind, Buxton, OR (US);
Thomas Christopher Hoff, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Described herein are IC devices include patterned conductive layers, such as metal gratings and gate layers, and patterned layers formed over the patterned conductive layers using a directed self-assembly (DSA)-enabled process with DSA assisting features. A patterned conductive layer may have non-uniform features, such as large regions of insulator within a metal grating, or varying gate lengths across a gate layer. The DSA assisting features enable the formation of patterned layers, e.g., layers with different hard mask materials replicating the structure of the conductive layer below, even over non-uniform features.