The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 10, 2024
Filed:
Dec. 22, 2020
Intel Corporation, Santa Clara, CA (US);
Biswajeet Guha, Hillsoro, OR (US);
Brian Greene, Portland, OR (US);
Daniel Schulman, Hillsboro, OR (US);
William Hsu, Hillsboro, OR (US);
Chung-Hsun Lin, Portland, OR (US);
Curtis Tsai, Beaverton, OR (US);
Kevin Fischer, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Substrate-less electrostatic discharge (ESD) integrated circuit structures, and methods of fabricating substrate-less electrostatic discharge (ESD) integrated circuit structures, are described. For example, a substrate-less integrated circuit structure includes a first fin and a second fin protruding from a semiconductor pedestal. An N-type region is in the first and second fins. A P-type region is in the semiconductor pedestal. A P/N junction is between the N-type region and the P-type region, the P/N junction on or in the semiconductor pedestal.