The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Nov. 05, 2024

Filed:

Nov. 04, 2021
Applicant:

Taiwan Semiconductor Manufacturing Company, Ltd., Hsinchu, TW;

Inventors:

Tzu-Chun Tang, Kaohsiung, TW;

Chung-Hao Tsai, Changhua County, TW;

Chen-Hua Yu, Hsinchu, TW;

Chuei-Tang Wang, Taichung, TW;

Che-Wei Hsu, Kaohsiung, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/528 (2006.01); H01L 21/683 (2006.01); H01L 23/00 (2006.01); H01L 23/485 (2006.01); H01L 23/522 (2006.01); H01L 23/532 (2006.01); H01L 23/538 (2006.01); H01L 23/66 (2006.01); H01Q 1/22 (2006.01); H01L 21/56 (2006.01); H01L 21/66 (2006.01); H01L 23/31 (2006.01);
U.S. Cl.
CPC ...
H01L 23/528 (2013.01); H01L 21/6835 (2013.01); H01L 23/485 (2013.01); H01L 23/5226 (2013.01); H01L 23/53228 (2013.01); H01L 23/53233 (2013.01); H01L 23/5389 (2013.01); H01L 23/66 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01Q 1/2283 (2013.01); H01L 21/568 (2013.01); H01L 22/32 (2013.01); H01L 22/34 (2013.01); H01L 23/3128 (2013.01); H01L 23/3135 (2013.01); H01L 23/3171 (2013.01); H01L 24/03 (2013.01); H01L 24/06 (2013.01); H01L 24/14 (2013.01); H01L 2221/68313 (2013.01); H01L 2221/68359 (2013.01); H01L 2223/6616 (2013.01); H01L 2223/6677 (2013.01); H01L 2224/02331 (2013.01); H01L 2224/02381 (2013.01); H01L 2224/0401 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/9222 (2013.01);
Abstract

An electronic apparatus is provided. The electronic apparatus includes an integrated fan-out package, a dielectric housing, and a plurality of conductive patterns. The dielectric housing is covering the integrated fan-out package, wherein a gap or a first dielectric layer is in between the dielectric housing and the integrated fan-out package. The plurality of conductive patterns is located on a surface of the dielectric housing, wherein the plurality of conductive patterns is located in between the dielectric housing and the integrated fan-out package.


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