The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 06, 2024
Filed:
May. 14, 2021
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Shuen-Shin Liang, Hsinchu, TW;
Chih-Chien Chi, Hsinchu, TW;
Chien-Shun Liao, Taipei, TW;
Keng-Chu Lin, Ping-Tung, TW;
Kai-Ting Huang, Hsinchu, TW;
Sung-Li Wang, Zhubei, TW;
Yi-Ying Liu, Hsinchu, TW;
Chia-Hung Chu, Taipei, TW;
Hsu-Kai Chang, Hsinchu, TW;
Cheng-Wei Chang, Taipei, TW;
Taiwan Semiconductor Manufacturing Co., Ltd., Hsinchu, TW;
Abstract
The present disclosure describes a method for forming metallization layers that include a ruthenium metal liner and a cobalt metal fill. The method includes depositing a first dielectric on a substrate having a gate structure and source/drain (S/D) structures, forming an opening in the first dielectric to expose the S/D structures, and depositing a ruthenium metal on bottom and sidewall surfaces of the opening. The method further includes depositing a cobalt metal on the ruthenium metal to fill the opening, reflowing the cobalt metal, and planarizing the cobalt and ruthenium metals to form S/D conductive structures with a top surface coplanar with a top surface of the first dielectric.