The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 12, 2023

Filed:

Dec. 13, 2018
Applicant:

Intel Corporation, Santa Clara, CA (US);

Inventors:

Rahul Ramaswamy, Portland, OR (US);

Nidhi Nidhi, Hillsboro, OR (US);

Walid M. Hafez, Portland, OR (US);

Johann C. Rode, Hillsboro, OR (US);

Paul Fischer, Portland, OR (US);

Han Wui Then, Portland, OR (US);

Marko Radosavljevic, Portland, OR (US);

Sansaptak Dasgupta, Hillsboro, OR (US);

Assignee:

Intel Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 27/06 (2006.01); H01L 21/8236 (2006.01); H01L 21/8252 (2006.01); H01L 21/8234 (2006.01); H01L 27/088 (2006.01);
U.S. Cl.
CPC ...
H01L 29/778 (2013.01); H01L 21/8236 (2013.01); H01L 21/8252 (2013.01); H01L 21/823462 (2013.01); H01L 27/0629 (2013.01); H01L 27/0883 (2013.01); H01L 29/66462 (2013.01); H01L 29/66545 (2013.01); H01L 29/78 (2013.01);
Abstract

Embodiments include a transistor and methods of forming such transistors. In an embodiment, the transistor comprises a semiconductor substrate, a barrier layer over the semiconductor substrate; a polarization layer over the barrier layer, an insulating layer over the polarization layer, a gate electrode through the insulating layer and the polarization layer, a spacer along sidewalls of the gate electrode, and a gate dielectric between the gate electrode and the barrier layer.


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