The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 01, 2023
Filed:
Apr. 22, 2019
Intel Corporation, Santa Clara, CA (US);
Nidhi Nidhi, Hillsboro, OR (US);
Marko Radosavljevic, Portland, OR (US);
Sansaptak Dasgupta, Hillsboro, OR (US);
Yang Cao, Beaverton, OR (US);
Han Wui Then, Portland, OR (US);
Johann Christian Rode, Hillsboro, OR (US);
Rahul Ramaswamy, Portland, OR (US);
Walid M. Hafez, Portland, OR (US);
Paul B. Fischer, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Disclosed herein are IC structures, packages, and devices that include III-N transistors implementing various means by which their threshold voltage it tuned. In some embodiments, a III-N transistor may include a doped semiconductor material or a fixed charge material included in a gate stack of the transistor. In other embodiments, a III-N transistor may include a doped semiconductor material or a fixed charge material included between a gate stack and a III-N channel stack of the transistor. Including doped semiconductor or fixed charge materials either in the gate stack or between the gate stack and the III-N channel stack of III-N transistors adds charges, which affects the amount of 2DEG and, therefore, affects the threshold voltages of these transistors.