The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 13, 2023
Filed:
Nov. 09, 2021
Applicant:
Intel Corporation, Santa Clara, CA (US);
Inventors:
Bok Eng Cheah, Bukit Gambir, MY;
Seok Ling Lim, Kulim, MY;
Jenny Shio Yin Ong, Bayan Lepas, MY;
Jackson Chung Peng Kong, Tanjung Tokong, MY;
Kooi Chi Ooi, Glugor, MY;
Assignee:
Intel Corporation, Santa Clara, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/552 (2006.01); H01L 23/48 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01);
U.S. Cl.
CPC ...
H01L 23/552 (2013.01); H01L 23/481 (2013.01); H01L 23/5226 (2013.01); H01L 23/5283 (2013.01); H01L 23/5286 (2013.01);
Abstract
Two conductive reference layers are embedded in a semiconductor package substrate. The embedded reference layers facilitate low electromagnetic noise coupling between adjacent signals for semiconductor device package.
Quick Actions:
Cheah, Bok. (2023). Embedded reference layers for semiconductor package substrates (U.S. Patent No. 11676910). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/11676910
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile