The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2023
Filed:
Mar. 28, 2019
Intel Corporation, Santa Clara, CA (US);
Han Wui Then, Portland, OR (US);
Nidhi Nidhi, Hillsboro, OR (US);
Paul B. Fischer, Portland, OR (US);
Rahul Ramaswamy, Portland, OR (US);
Walid M. Hafez, Portland, OR (US);
Samuel Jack Beach, Aloha, OR (US);
Xiaojun Weng, Portland, OR (US);
Johann Christian Rode, Hillsboro, OR (US);
Marko Radosavljevic, Portland, OR (US);
Sansaptak Dasgupta, Hillsboro, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Disclosed herein are IC structures, packages, and devices that include thin-film transistors (TFTs) integrated on the same substrate/die/chip as III-N devices, e.g., III-N transistors. In various aspects, TFTs integrated with III-N transistors have a channel and source/drain materials that include one or more of a crystalline material, a polycrystalline semiconductor material, or a laminate of crystalline and polycrystalline materials. In various aspects, TFTs integrated with III-N transistors are engineered to include one or more of 1) graded dopant concentrations in their source/drain regions, 2) graded dopant concentrations in their channel regions, and 3) thicker and/or composite gate dielectrics in their gate stacks.