The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 21, 2023
Filed:
Mar. 01, 2019
Intel Corporation, Santa Clara, CA (US);
Nidhi Nidhi, Hillsboro, OR (US);
Rahul Ramaswamy, Portland, OR (US);
Han Wui Then, Portland, OR (US);
Marko Radosavljevic, Portland, OR (US);
Sansaptak Dasgupta, Hillsboro, OR (US);
Johann Christian Rode, Hillsboro, OR (US);
Paul B. Fischer, Portland, OR (US);
Walid M. Hafez, Portland, OR (US);
Intel Corporation, Santa Clara, CA (US);
Abstract
Disclosed herein are IC structures, packages, and devices that include planar III-N transistors with wrap-around gates and/or one or more wrap-around source/drain (S/D) contacts. An example IC structure includes a support structure (e.g., a substrate) and a planar III-N transistor. The transistor includes a channel stack of a III-N semiconductor material and a polarization material, provided over the support structure, a pair of S/D regions provided in the channel stack, and a gate stack of a gate dielectric material and a gate electrode material provided over a portion of the channel stack between the S/D regions, where the gate stack at least partially wraps around an upper portion of the channel stack.