The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 13, 2022
Filed:
Sep. 26, 2018
Intel Corporation, Santa Clara, CA (US);
Arnab Sen Gupta, Hillsboro, OR (US);
Matthew Metz, Portland, OR (US);
Benjamin Chu-Kung, Portland, OR (US);
Abhishek Sharma, Hillsboro, OR (US);
Van H. Le, Portland, OR (US);
Miriam R. Reshotko, Portland, OR (US);
Christopher J. Jezewski, Portland, OR (US);
Ryan Arch, Hillsboro, OR (US);
Ande Kitamura, Portland, OR (US);
Jack T. Kavalieros, Portland, OR (US);
Seung Hoon Sung, Portland, OR (US);
Lawrence Wong, Beaverton, OR (US);
Tahir Ghani, Portland, OR (US);
Intel Corporatiion, Santa Clara, CA (US);
Abstract
Embodiments herein describe techniques for a semiconductor device including a substrate and a transistor above the substrate. The transistor includes a channel layer above the substrate, a conductive contact stack above the substrate and in contact with the channel layer, and a gate electrode separated from the channel layer by a gate dielectric layer. The conductive contact stack may be a drain electrode or a source electrode. In detail, the conductive contact stack includes at least a metal layer, and at least a metal sealant layer to reduce hydrogen diffused into the channel layer through the conductive contact stack. Other embodiments may be described and/or claimed.